The Chips to Start-up Programme is playing a central role in strengthening India’s indigenous semiconductor chip design ecosystem by enabling large-scale skill development, infrastructure access, and hands-on chip design across academic institutions and startups nationwide.
Launched by the Ministry of Electronics and Information Technology (MeitY), the Chips to Start-up Programme is designed to build a sustainable pipeline of industry-ready semiconductor talent while fostering innovation, intellectual property creation, and startup incubation in chip design.
Chips to Start-up Programme: Building Talent at Scale
India’s semiconductor ambitions are being supported through targeted capacity-building initiatives under the Chips to Start-up Programme, which spans over 400 organisations, including 305 academic institutions and 95 startups.
The Chips to Start-up programme addresses the global shortage of semiconductor professionals while positioning India as a key contributor to the global chip design workforce.
To date, more than one lakh individuals have enrolled in chip design training, with approximately 67,000 participants already trained across undergraduate, postgraduate, and doctoral levels.
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Programme Overview: Chips to Start-up Programme
The Chips to Start-up Programme, launched in 2022, is a national umbrella initiative with a total outlay of ₹250 crore over five years. It aims to develop 85,000 industry-ready professionals, including:
- 200 PhD scholars engaged in advanced chip design research
- 7,000 M.Tech graduates specialising in VLSI or Embedded Systems
- 8,800 M.Tech graduates from allied disciplines with focused VLSI exposure
- 69,000 B.Tech students trained through VLSI-oriented coursework
Beyond workforce development, the Chips to Start-up Programme seeks to incubate 25 startups, enable 10 technology transfers, facilitate access to SMART lab infrastructure, train one lakh students, generate 50 patents, and support at least 2,000 research publications.
Hands-On Chip Design Under the Chips to Start-up Programme
The Chips to Start-up Programme adopts a practical, end-to-end approach to chip design education. Students gain exposure to real-world semiconductor workflows through access to advanced Electronic Design Automation (EDA) tools, fabrication facilities, and testing infrastructure.
Through industry-led training, mentorship, and R&D projects, participants design and prototype Application-Specific Integrated Circuits (ASICs), Systems-on-Chip (SoCs), and reusable Intellectual Property (IP) cores. This approach bridges academic learning with industry-grade semiconductor development practices.Coordinating Organization Mode Area 100+ Participating Academic Institutions(Beneficiaries of project funds, EDA Tools & trainings) Implementation of R&D projects for design & fabrication (2–5 years)Instruction as part of curriculum, Short-term courses, labs, and student projects (including nearby institutions). End-to-end exposure to chip design, fabrication, and testing through R&D projects 200+ Other Organizations(Beneficiaries of EDA Tools & trainings) Instruction as part of curriculum, Short-term courses, labs, and student projects. General chip design flows using advanced EDA tools. ChipIN Centre, C-DAC Bangalore(Serving 300+ institutions) Regular training sessions with industry partners. Facilities include: Specialized design areas using advance tools. EDA tools Synopsys, Cadence, IBM, Siemens EDA, Ansys, Keysight Technologies, Silvaco, AMD, Renesas Foundry access SCL, IMEC, MUSE Semiconductors Chip design flow ChipIN Centre, NIELIT SMART Lab, NIELIT Calicut (Pan-India institutions) Identified short-term and certification courses. General chip design flows using centralized hardware resources.
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ChipIN Centre’s Role in the Chips to Start-up Programme
The ChipIN Centre at C-DAC Bengaluru serves as a national hub for shared semiconductor design infrastructure under the Chips to Start-up Programme.
It provides participating institutions and startups with access to commercial EDA tools, compute infrastructure, IP libraries, and technical mentorship across the entire chip design lifecycle.
Chips to Start-up Programme: Fabrication and Technical Support
The ChipIN Centre aggregates chip designs every three months and sends them to the Semi-Conductor Laboratory (SCL), Mohali, for fabrication using 180 nm technology.
- Designs are verified, refined, and integrated onto shared wafers before fabrication.
- Fabricated and packaged chips are delivered back to students for validation and testing.
- Over 4,855 technical support requests have been addressed by the ChipIN Centre to date.
Key Outcomes of the Chips to Start-up Programme
The Chips to Start-up Programme has delivered measurable outcomes across skill development, infrastructure access, and innovation enablement:
- Around one lakh individuals from 400 organisations have used shared national EDA infrastructure, generating over 175 lakh hours of tool usage
- Six shared wafer runs enabled 122 chip design submissions from 46 institutions
- 56 student-designed chips were successfully fabricated, packaged, and delivered
- 265+ industry-led training sessions conducted across core chip design domains
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Participating institutions have filed over 75 patents
Development of 500+ IP cores, ASICs, and SoC designs for defence, telecom, automotive, consumer electronics, and industrial applications
- FPGA boards distributed for hands-on learning and design validation
- High-performance computing access enabled through the PARAM Utkarsh supercomputer
- Institutional Framework Supporting the Chips to Start-up Programme
The success of the Chips to Start-up Programme is supported by a coordinated institutional framework involving MeitY, C-DAC, the ChipIN Centre, and the Semi-Conductor Laboratory, Mohali.
- MeitY provides policy direction, funding, and oversight for the Chips to Start-up Programme, aligning it with national semiconductor priorities.
- C-DAC operates the ChipIN Centre, offering shared design tools, compute resources, and technical mentoring.
- SCL Mohali enables fabrication and packaging of student-designed chips through shared wafer runs, allowing participants to validate designs on silicon.
This integrated framework ensures equitable access to national chip design infrastructure while strengthening academia–industry collaboration.
Conclusion
The Chips to Start-up Programme reflects India’s strategic focus on building a self-reliant and globally competitive semiconductor ecosystem.
By combining large-scale skill development, hands-on chip design, and access to national infrastructure, the programme is empowering students, researchers, and startups to contribute meaningfully to indigenous chip design and innovation.
